1. Technical Field
The present invention generally relates to a method of forming a semiconductor device on a silicon on insulator (SOI) type substrate, and a semiconductor device formed thereby. More specifically, a method of preventing a SOI layer from bending around an active region when trench device isolation is performed on the SOI-type substrate and a semiconductor device formed thereby.
2. Discussion of Related Art
When adjacent semiconductor layers having different impurity types are formed the interface between the layers acts as an isolation barrier. Commonly employed junction-type isolation techniques are usually not suitable for high-voltage junctions in semiconductor layers because the voltage-resistance characteristics are weak at high voltage junction surfaces. Further, unwanted current may flow a junction depletion layer caused by a radiation ray such as a gamma ray, rendering the isolation technique inefficient in a high-radiation circumstance. Therefore, a SOI-type semiconductor device where a device region is completely isolated by an insulating layer is generally used in high-performance semiconductor devices such as a central processing unit (CPU).
Mesa, local oxidation of silicon (LOCOS), and shallow trench isolation (STI) techniques have widely been used to isolate devices on an SOI-type substrate. The STI technique prevents a bird's beak phenomenon that occurs in the LOCOS technique. The bird's beak phenomenon practically decreases a device formation area. Accordingly, the STI technique is generally applied to a highly integrated semiconductor device.
When the STI technique is applied for device isolation on an SOI-type substrate, an undesirable bending phenomenon occurs in a silicon layer composing an active region due to a structural characteristic of the substrate. This problem is illustrated in FIGS. 1 through 3.
Referring to FIG. 1, a typical SOI-type substrate may comprise a lower silicon layer 10, a buried silicon oxide layer 11, and an SOI layer 13 that are sequentially stacked. The SOI layer 13 composes an active region. In order to perform STI, a pad oxide layer 15 and a silicon nitride layer 17 serving as an etch-stop layer are sequentially stacked on an SOI layer of an SOI-type substrate. Using a photoresist layer 19 the silicon nitride layer 17 is then patterned to form a pattern made of silicon nitride.
Referring to FIG. 2, using the pattern of the silicon nitride layer 17 as an etching mask, the exposed pad oxide layer 15 and the SOI layer thereunder are etched to form a trench and a patterned SOI layer 23. Therefore, the bottom of the trench is formed of the silicon oxide layer 11.
Referring to FIG. 3, a sidewall oxide layer 25 is formed on the sidewalls of the trench. The sidewall oxide layer 25 results from a heat treatment for curing crystalline defects. An interface between the patterned SOI layer 23′ and the buried silicon oxide layer 11 serves as an oxygen diffusion path. Because oxygen is smoothly supplied to the exposed sidewall according to a trench shape, an oxide layer is extended from the trench into an active region, on a bottom of the patterned SOI layer 23′. Accordingly, a wedging thermal oxide layer 24 is penetrated between the SOI layer 23′ and the buried silicon oxide layer. The material of the thermal oxide wedges 24 are of greater volume than the original silicon and therefore expand, thereby lifting the immediately adjacent portion 26 of the patterned SOI layer 23′ from the trench. Hence, the SOI layer is bent.
When bending occurs, stress is applied to the SOI layer by a lifting force from the sidewall of the trench. If the following ion implantation process is then carried out, a crystalline defect is created in the SOI layer. The created crystalline defect is easily expanded by the lifting force, and increases junction leakage currents. Even though the crystalline defect does not occur during ion implantation, a depth of the SOI layer is partially changed and that of practical ion implantation is also changed by the bending. This leads to instability of threshold voltages (A comparison of oxidation induced stress and defectivity in SIMOX and bonded SOI wafers may be found in Proceedings of the 1997 IEEE International SOI Conference, October 1997; Stress Induced Defect and Transistor Leakage for Shallow Trench Isolated SOI: IEEE Electron Device Letters, Vol. 20, No. 5, May 1999).
Under conditions that form sidewall oxide layers to a thickness of about 240 Å, a part of an SOI layer up to 4000 Å from the sidewall trench can be lifted. Even though the bending phenomenon is changed according to the degree and condition of sidewall oxidation, it cannot completely be prevented. It is therefore desirable to provide a method or methods of manufacturing semiconductor devices in a manner that eliminates or at least alleviates such bending.